1. Field of the Disclosure
The present disclosure relates generally to data processing devices and methods, and more particularly to the processing of information requests.
2. Description of the Related Art
A data processing device can include one or more peripheral interconnect devices to support the exchange of information with other data processing devices. To facilitate interoperability of data processing devices, manufacturers of data processing devices conventionally implement industry-standard interconnect technologies and associated protocols. One example of an industry-standard interconnect technology is the Peripheral Component Interconnect Express (PCI-Express or PCI-E) standard. PCI-E is used in consumer, server, and industrial applications; both as a motherboard-level interconnect to link motherboard-mounted peripherals, and as an expansion card interface for add-on peripheral device hardware. PCI-E devices communicate via a logical connection called a link. A link is a point-to-point communications channel between two PCI-E ports, allowing both ports to send/receive PCI-requests and interrupts. PCI-E channel is a serial interface that supports one or more lanes, wherein each lane includes a separate transmit-pair and receive-pair of serial lines. Each lane supports full duplex transport of packetized information.
PCI-E is a layered protocol, consisting of a transaction layer, a data link layer, and a physical layer. PCI-E implements split transactions (transactions with request and response separated by time), thereby allowing the link to carry other traffic while the target device gathers data for a response. The data link layer implements the sequencing of transaction layer packets that are generated by the transaction layer. The PCI-E protocol includes error detection/correction using cyclic redundancy checks, receipt acknowledgement, and other restrictions, such as rules governing out-of-order completion of transactions.